Generally, the display controller in the display system processes image data from different video sources for display. The image data from different sources may comply with different display formats, and require different image processes. For example, the traditional television signals need to be deinterlaced and scaled for displaying a desired image on a screen. On the other hand, the progressively scanned image signals need to be scaled to appropriate size for display. In the multiple windows display, such as PIP or POP, in order to display the main window together with the sub window, the conventional display controller needs to be equipped with at least two independent sets of circuits for processing the signals from different video sources.
FIG. 1 shows a block diagram of a multi-window display system 100 according to the prior art. The display system 100 includes a display controller 110, external buffers 142 and 144, and a display panel 190. The display controller 110 includes a first line buffer 152 and a second line buffer 154, a first deinterlacer 162 and a second deinterlacer 164, a first scaler 172 and a second scaler 174, and a mixer 180. The display controller 110 is coupled to the external buffers 142 and 144, e.g. dynamic random access memory. The display controller 110 receives a first video source and a second video source, which can be an analog video source or a digital video source, for multi-window display. For example, the first and the second video sources may be two different video signals, or one TV signal and one DVD signal. The display controller 110 may preprocess the received video sources. For example, when the resolution of the video source is higher than the resolution of the outputted image, a down-sampling process may be performed on the video sources to reduce the required capacity of the line buffers 152 and 154 and the external buffers 142 and 144. The external buffers 142 and 144 respectively buffer image data of the first video source and the second video source. The line buffers 152 and 154 buffer a plurality of scan lines of the first and the second video sources respectively. The deinterlacers 162 and 164 respectively interlace scan line data buffered in the line buffers 152 and 154. The scalers 172 and 174 scale the image data which have been deinterlaced by the deinterlacers 162 and 164 respectively. Finally, the mixer 180 mixes the scaled image data associated with the first and the second video sources and then the mixed output is multi-window displayed on the display panel 190.
Each display image includes, depending on the display standard, 525 scan lines. The line buffers 152 and 154 are capable of buffering a plurality of scan lines. Since the line buffers 152 and 154 are embedded inside the display controller 110, the gate count and the manufacturing cost will increase for storing more Scan line data in the line buffers 152 and 154. In addition, the structure of the deinterlacers 162 and 164 and the scalers 172 and 174 are complicated, and therefore the cost of two independent sets of hardware structure is high. There are several standards of display resolution, such as a WXGA, UXGA, full HD, and et al. As the display resolution raises, the required capacity of the line buffers 152 and 154 and the external buffers 142 and 144 also increases. For example, when the high-resolution display is up to 1920*1080 with the multi-window display, the required capacity of the external buffers 142 and 144 increases significantly. To meet the requirement of high-resolution display, the prior art must increase the capacity of the line buffers 152 and 154 and the external buffers 142 and 144. To access large amount of data for multi-window display for high display resolution, the prior art adopts the high-end DRAMs with high capacity for the independent external buffers 142 and 144, to avoid image destruction. Therefore, the display controller 110 requires the independent corresponding hardware interface, namely, the display controller 110 requires additional pins for connecting with the independent external buffers 142 and 144.
Therefore, it is necessary to provide a display controller for displaying multiple windows which can reduce the whole hardware cost.